These Verilog files can each be used in place of ROM.v in the external memory code that runs on an FPGA during single FPGA emulation or PCB-FPGA/Dual FPGA configurations. They need only be copied into the project directory where ROM.v exists and renamed to 'ROM.v'. Each of these files was built by the Systems team during testing.
Important note: The ROMs were built with MuddCLib compiled to run with a 2 MHz clock. If run at a faster clock speed, ROMs that use the delay functions (e.g. that use the LCD or that animate LEDs) may not work properly since the delay functions are cycle-speed dependent. When you increase the clock speed, you may want to recompile these ROMs.
| dhrystone.v | The working Dhrystone benchmark ROM. |
| dhrystone_toFail.v | A build of Dhrystone with a bad value in one of the verification-phase tests, illustrating the functionality of the Dhrystone benchmark if it malfunctions. |
| lightsOut.v | The Lights Out! demo program |
| test_buttons.v | The test program that tests the push buttons on the Virtex board |
| test_lcd.v | The test program the should display "Hello, World!" and some other text on the LCD |
| test_led_asm.v | A very lightweight test program (no bootloader included) that sets the LEDs to 9 in binary |
| test_leds_dipswitches.v | A test program that turns on LEDs when the DIP switches are changed, using the stack to keep state |
| test_leds_global_variables.v | A test program that turns on LEDs when the DIP switches are changed, but uses global variables instead of the stack |
| test_simple.v | A test program that counts up from 0 and displays in binary on the LEDs |
| test_simple_nobootload.v | The simple test program without the bootloader included |